1. Parsytec reckons the tests it has done on lower clock frequencies point to a six- to ten-fold performance increase over the T805.

2. NRZ code doesn't contain synchronous clock frequency.

3. The external clock frequency applied to the AD7764 determines the sample rate, filter corner frequencies, and output word rate.

4. The clock frequency is 1 MHz. The device samples sensor - read data during the write operation.

5. Over the years, the clock frequency became the key measure of processor performance.

6. A second reason why clock frequency will no longer be an accurate measure of performance is that distributing the clock's signal to all the different parts of a chip is more difficult that it sounds.

7. With the increasing of the processor clock frequency, the system throughput increases rapidly accordingly.

8. The third counter starts counting in the first clock frequency when receiving the enabling signal, and stops counting when the enabling signal stops.

9. Simulation results show the PLL clock frequency multiplier has lower phase noise and shorter capture time.

10. Input clock frequency of 500 Hz, the time for lights between 1 - 4 seconds , they can control.

11. Clock frequency distribution of the device in the scope permitted at no restrictions on frequency.

12. DCM can synthesize the clock frequency, phase shift and eliminate clock skew, solving many clocking issues.

13. The higher the clock frequency is, the more PLL influences the performance of microprocessors. PLL technique has been one of the core techniques in modern microprocessor design.

14. Faster operating speeds can be obtained with a higher clock frequency and more stages of pulse deletion.

15. In this case high frequencies means anything above approximately half the clock frequency.

16. The sample rate, filter corner frequencies and output word rate are set by a combination of the external clock frequency and the configuration registers of the AD7762.

17. The analog input is continuously sampled by an analog modulator at twice the clock frequency eliminating the need for external sample-and-hold circuitry.

18. The results indicate that Gray code counter counts accurately in the case of high clock frequency and obviously eliminates the emergence of glitch.

19. The results of experimention show that NDLL has advantages of fast tracking velocity, high distinguishability and low tracking error in the condition of low clock frequency.

20. The sample rate, filter corner frequencies and output word rate are set by a combination of the external clock frequency and the configuration registers of the AD7763.

21. SOC ( System - on - chip ) is one kind of large scale and complex IC driven by high clock frequency.

22. The sample rate, filter corner frequencies, and output word rate are set by a combination of the external clock frequency and the configuration registers of the AD7760.

23. The experimental results show that measurement accuracy can be increased to the order of decimeter or centimeter by using the time amplifying technique with lower clock frequency.

24. Clock Tree Synthesis is important in the backend-end design of chip design(Sentence dictionary), and the clock skew has become the major part of constraints that limit system clock frequency.

25. The sample rate, filter corner frequency, settling time, group delay and output word rate will be reduced also, as these are proportional to the external clock frequency.