1. The invention discloses a clock generator.

2. C 3 - Deep Sleep: clock generator is off.

3. Clock generator circuit for desktop video systems (CGC).

4. An on Chip Clock Generator with high stability is presented.

5. The sampling clock generator must also have adequate spectral purity.

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6. ICS1523 is a high performance programmable line-lock clock generator with the I2C serial bus interface. User can use it to generate desired line-locked clock by programming it.

7. The important function designing the PLL was a clock generator and frequency synthesizer.

8. In chapter two, a three nonoverlapping phases clock generator is presented at first and the experimental results are given finally.

9. Here, we use a DLL-based clock generator with nonoverlapping circuit to generate three nonoverlapping phases used for capacitor error-averaging in pipelined ADC.

10. First, in order to analyze the PLL clock generator, we have established the loop parameters. The parameters effect on the PLL transient characteristic has been studied.

11. A clock generator generates a digital clock signal and a frequency synthesizer generates a frequency that can have a different frequency from the original reference signal.

12. The on-chip voltage reference and the on-chip clock generator eliminate the need for any external components in capacitive sensor applications.

13. The two-phase clock signal for the delay line is provided by a matching clock generator chip.

14. The RFID analog front end includes a local oscillator, clock generator, power on reset circuit, matching network and backscatter, rectifier, regulator, and AM demodulator.

15. The whole circuit consists of Sample and Hold Circuit, the Multiplicative A/D Converter, the Sub-ADC, the Digital Calibration Circuit, the Clock Generator and the Time Synchronizer.

16. A fast simulation environment has been developed using MATLAB and SIMULINK for behavioral level simulation of spread spectrum clock generator based Fractional-N frequency synthesizers.

17. The ring oscillator is intended to serve as a clock generator or as a part of VCO that to be used in a mix-signal area.

18. The low power consumption digital true random source comprises a high speed random oscillator signal generator, an alternative oscillation stop control unit, a clock generator and a sampling unit.

19. This commercial integrated chip can be used in the local oscillation circuit, high-accuracy clock generator and so on.

20. The whole circuit consists of sample and hold, the sub-ADC, the sub DAC, the clock generator and digital correction circuits.

21. In this paper, the basic theory of high frequency clock generator is described in detail firstly, including the theory, structure, characteristics and application of PLL, CPPLL, DLL.