(1) The circuit of a 2-bit shift register is shown in Fig. 18.

(2) The 2-bit shift register may be constructed using the Plugblock layout shown in Fig. 19.

(3) The extent of the shift registered by these approaches becomes clear when compared with its antecedents.

(4) All nominal outputs of the shift register are 1.

(5) The parallel number is applied to the shift register.

(6) The twenty-three(23) bits residing in the scrambler shift register prior to the transmission of a packet.

(7) Each device has an eight-bit CMOS shift register and CMOS control circuitry, eight CMOS data latches, and eight bipolar current-sinking Darlington output drivers.

(8) The shift register is a device in which information may enter sequentially or in parallel.

(9) The invention provides a display having a shift register circuit capable of suppressing increase of power consumption is provided.

(10) A DET shift counter designed with the DET shift register is demonstrated.

(11) In an MOS dynamic shift register the above problem is solved by keeping data in continuous motion.

(12) The shift register should be set or cleared to produce the desired sequence.

(13) MT algorithm is one of Feedback Shift Register Generators, which has been applied into many fields widely, due to its long-period, high decision and good random performance in high-dimension.

(14) Simple shift register with testbench in vhdl complete source code, has been tested.

(15) Bidirectional shift register is a kind of medium-scale integrated circuits, it can be used to compose various counters conveniently.

(16) It is called a shift register because the data is shifted through the register by one bit position on each clock pulse.

(17) The design principle can be extended to other multiple-valued linear feedback shift register with a higher radix.

(18) The voltage detector includes several sub-systems such as a multi-path selector, a buffer amplifier, a comparator, a 12-bit SAR ADC, a shift register and a status bar.

(19) A method, which generates all M-sequences of non-shift-equivalent for any stages feedback shift register on the computer, is given in this paper.

(20) In this paper the structure features and performance of a high-speed shift register which is used as vector register are discussed and analysed. The analysis is verified by computer-aided calculation.

(21) I did this by using a software linear feedback shift register to generate pseudorandom values; see Resources.

(22) The protocol realized some functions, such as two-way data buffer, shift register, clock circuit and parity check.

(23) We also discussed the method of generating security CRC using linear feedback shift register.

(24) This paper gives some properties of companion matrix of polynomial over finite field with its application for evaluating period of linear shift register sequence and minimal length of cyclic code.

(25) To achieve high data rate and low circuit complexity, the architecture combines shift register and tree-type MUX .

(26) The polynomials are derived from an original polynomial, which defines a feedback function of a linear feedback shift register capable for generating the pseudo random number.

(27) Bucket brigade device (BBD) is usually used as analogue shift register with MOS structure, which can provide an accurate delay fur the analogue signal.

(28) Then each correlative sequence of this generator is analyzed by the knowledge of Probability, Stochastic Processes, Feedback Shift Register, etc.

(29) Based on logic gates of complementary single-electron transistor (SET), three units are proposed as follows: full adder, shift register and ROM.

(30) This paper presented the design and implementation of two sequential circuits in FPGA configurable logic block, namely, distributed RAM and shift register.

(31) If it is combined with the modulo-3 addition circuit, the linear feedback shift register can be realized easily.

(32) The shift register in amorphous silicon grid driver comprises: one pull-up transistor, and two pull-down modules.

(33) The logic function of this DET shift register is proved by PSPICE simulation.

(34) Two of the most common types of shift register counters are introduced here: the Ring counter and the Johnson counter.

(35) In a shift register mode of the data storage device (120), the address decoder (140) is responsive to an address generator (160) comprising a modulo-N counter.

(36) Bucket brigade device(BBD) is usually used as analogue shift register with MOS structure, which can provide an accurate delay for the analogue signal.

(37) Universal Shift Register complete source code can be used directly.

(38) In an MOS dynamic shift register the above problem is solved by keeping data continuous motion.

(39) A shift register that transfers information from stage to stage in response to timing signals.

(40) This is easily accomplished with NOT gates,[http:///shift register.html] and a 7 bit shift register.

(41) This paper expounds the definition of linear shift register sequence and correlative concepts, as well as lemmas which are essential to the proof of the theorem, and presents content of the theorem.

(42) In chapter 5, the on-screen driving circuits composed of P-channel TFT have been designed, including inverter, shift register, transmission gate and simulated using simulation software.

(43) Here , an eight-bit serial shift register(74LS164)shifts a logic 0 for one or more clock periods from one of its Q outputs through to the RDY1 input of the 8284A.

(44) This has the advantage that the output of a predecessor data storage element (130) in a shift register need not be interconnected to the input of its successor.

(45) The parallel loading of the flip-flop can be synchronous (i. e. , occurs with the clock pulse) or asynchronous (independent of the clock pulse) depending on the design of the shift register.

(46) A pulse selector circuit supplies a drive pulse to the desired pixel row selected by the vertical shift register circuit.