1. Study on phase noise modeling in CMOS oscillator.

2. Dual 4-stage binary ripple counter. High-performance silicon-gate CMOS.

3. Quad 2-input NOR gate. High-performance silicon-gate CMOS.

4. Dual 8-channel, low-leakage, CMOS analog multiplexer.

5. Octal 3-state noninverting transparent D flip-flop. High-performance silicon-gate CMOS.

6. Locate the 3 pin CMOS password reset jumper on the system board.

7. Each device has an eight-bit CMOS shift register and CMOS control circuitry, eight CMOS data latches, and eight bipolar current-sinking Darlington output drivers.

8. The circuit was based on CMOS reference operating in subthreshold region, using PMOS differential input and push-pull CMOS output stage mode.

9. Composite transistor, composite-transistor pair, current squarer, and CMOS analog multiplier.

10. A high-precision CMOS current reference circuit is proposed for using in low-dropout (LDO) voltage regulators with low power.

11. This configuration forces the PDC master to announce itself as a reliable time source and uses the built-in complementary metal oxide semiconductor (CMOS) clock.

12. A high-frequence on-chip CMOS balanced operational amplifier with a stable common-mode feedback circuit is designed and fabricated.

13. We present a method for automatic synthesis of CMOS op-amp circuit and a data array description method of analog circuit.

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14. CMOS Op amp is reported which has a high common-mode input range and a high output swing.

15. The design technique for a CMOS four quadrant analog multiplier is presented, which is based on the characteristics of the MOSFET subthreshold region.

16. When associated debugging with Pico-satellite, the Ground System is succeeded to emit data, receive and retrieve images taken by the on-satellite CMOS camera clearly.

17. A digital cassette system is designed which is composed of CMOS imaging sensor with mega-pixel, high capacity FLASH and CPLD for engineering embedded equipments.

18. In this paper we study an auto - focusing system based on microprocessor and CMOS image sensor.

19. This paper describes the controlling circuit of a two-dimensional CMOS silicon wind sensor, which exploits CTD controlling mode and can simultaneously measure both the wind velocity and direction.

20. Quad D flip-flop with common clock and reset. High-performance silicon-gate CMOS.

21. In light of the fact that there are occasionally tramcar accidents in incline transport in mining, a CMOS chip-based digital detection and intelligent anti-skid system is developed.

22. Our company adopted American advanced vacuum encapsulation technology and CMOS chip, the controllability Si AC contactors is peerless in national market.

23. The project of optimization of structure and parameters of circuit is obtained through analyses the principle of differential negative-resistance CMOS VCO(Voltage Controlled Oscillator).

24. A sensitive, stable and low power consumption magnetic sensor is constructed using a CMOS multivibrator circuit, in which a sharp pulse train current is applied to the treated amorphous ribbon.

25. This paper describes the design and analysis of a fully differential, gain-enhanced CMOS telescopic operational transconductance amplifier(OTA) used in a pipeline analog-to-digital converter(ADC).

26. The chip's function includes transmitter-receiver of LVDS signal and serializer-deserializer of CMOS digital signal.

27. The coding rule of the password in AMI BIOS and the code's position in CMOS RAM are reveled in this paper and a method of decode and it's assemble assemble program are presented as well.

28. A static verification methodology for circuit design-flow of ASIC's based on very deep sub-micron CMOS technology is described in the paper.

29. High integration of imported large scale gate array device and high-speed CMOS integrated circuits ensure product reliability and low power consumption.

30. Testing based on stuck-at fault model is insufficient for high performance ICs, especially for CMOS circuits.

31. Designed a CMOS chip for the communications subsystem of the 6095 Graphics Terminal.

32. A new type of data acquisition and control system constructed of the 8-bit CMOS single chip microcomputer 80C39 is introduced in this paper.

33. The other was portable across any MS-DOS system, which utilized low-power CMOS technology.

34. An effective way to reduce the leakage power is by means of multithreshold CMOS technique, which can restrain the leakage current by adding a MOS transistor to low threshold circuit.

35. The output characteristics also make the AD590 easy to multiplex: the current can be switched by a CMOS multiplexer or the supply voltage can be switched by a logic gate output.

36. Flexfet? ULP will benefit AFRL and other Department of Defense (DoD) agencies by providing foundry access to advanced ULP CMOS technology.

37. This thesis deals with the analysis and design of CMOS complex band-pass filter used in - IF receivers.

38. This thesis is about the design of local oscillator circuit for wireless communication system in standard digital CMOS technology.

39. With the rapid development of microelectronics industry, the feature size of CMOS device is scaling down.

40. Based on the preamplifier-latch fast-compare theory, a novel topology of CMOS preamplifier latch comparator circuit is presented.

41. This paper proposes a novel high precision CMOS bandgap voltage reference which a soft - start up circuit.

42. A low voltage fully differential gain - boosted CMOS operational transconductance amplifier is designed.

43. For the first time, a fully integrated CMOS cascaded single-stage distributed amplifier has been designed(), fabricated and tested.

44. A third-order intermodulation distortion(IMD3) sinker composed of a PMOS FET and a tuned inductor is proposed for linearization of CMOS cascode LNA in this paper.

45. CMOS symmetrical three-valued ternary logic circuit was designed and fabricated, based on the information associated with symmetrical ternary logic combined with CMOS circuit processing features.

46. CMOS voltage reference circuit operate under sub-threshold state has been presented in this paper and analysising the limitation of MOSFET when it works in sub-threshold condition.

47. Introduction was made to the composition and working principle of a power-off time delay relay which adopts CMOS digital circuit, digital dial disc for switch setting and without auxiliary power.

48. A fast access time is achieved by using six-transistor CMOS memory cell, latched sense amplifier, and high-speed decoder circuit.

49. We use the thermal sensing circuit to replace the special material in antenna coupled bolometer in other process which the CMOS process does not provide.

50. DS90LV047A is a quad CMOS flow-through differential line driver designed for applications requiring ultra low power dissipation and high data rates.

51. Quad 2-input NAND gate with schmitt-trigger inputs. High-performance silicon-gate CMOS.

52. This thesis presents two injection locked frequency dividers and one injection locked frequency tripler, which are implemented by using standard TSMC 0.18um and 0.13um CMOS process respectively.

53. How to improve the performance of CMOS APS by high fill factor technology and direct image sensor technology is set forth in detail, and the applications of these two technologies are described.

54. The paper focuses on circuit design of power switch with bipolar technology and audio amplifier with CMOS techn.

55. A single chip Liquid Crystal Display (LCD) driver chip is developed based on dynamic scanning, which is a high voltage CMOS digital and analog mixed signal IC.

56. Circuit and layout design for a CMOS high voltage analog switch of CM7510 series, along with its manufacturing process and the circuit performance, are described.

57. After we analyze the latch-up characteristic of CMOS integrated circuits in detail, a "three-path" latch-up model is developed and used to explain the latch-up window phenomena reasonably.

58. The first thing the BIOS does is check the information stored in a tiny (64 bytes) amount of RAM located on a complementary metal oxide semiconductor (CMOS) chip.

59. At present, the CMOS image sensor mainly develops to the high resolution, the high dynamic range, the high sensitivity, the ultra microminiaturization, the digitization, the multi-purpose direction.

60. Adopted importable and military IC, controlled CMOS chip of switch power is of stability, reliability and long operative life.

61. Logic-input CMOS quad driver. High peak output current 1.2A. Wide operating range 4.5 to 18V. Device input configuration AND with INV.

62. The effect of rapid thermal processing(RTP) on oxygen precipitates profile and denude zone(DZ) in Czochralski(CZ) silicon wafer during simulating CMOS processing is investigated.

63. Planar spiral inductor is the most important passive component of CMOS RF integrated circuit design.

64. Differential, 8 channel (2 of 16) monolithic CMOS analog multiplexer.

65. With digital processing and reconstruction, an improved selective reset pixel structure and a design of pixel array to extend the dynamic range of CMOS image sensor (CIS) was achieved.

66. Proposed a detection system with Hall effect device array based on FPGA and DSP, the control signal of CMOS analog multiplexer and A/D generated by FPGA was simulated in FPGA d...

67. I have gone back to capacitive coupling from the receiver and also added a zener diode to protect the CMOS parts from possible static issues a little bit better.

68. Using a constant biasing current and a reduced output logic swing, current-steering logic avoids the large digital switching noise of conventional static CMOS logic.

69. The algorithm is employed in a multiple channel CMOS image sampling system and the application test results are excellent.

70. Beginning from the mixed logical expression of the clocked signal, application of theory of transmission-clamping to design low power dissipation CMOS circuits using pulsed power is studied.

71. However, developing C-HMOS called for the creation of ann-well CMOS process, That had not been done previously because CMOS technology grew naturally out of the older p-channel transistor.

72. A digitally controlled CMOS variable gain amplifier base on R 2R ladder resistance network is introduced.

73. Based on the ISFET structure and electronic characteristics,(http:///CMOS.html) a method integrating the ISFET and signal process circuit realized in an standard CMOS technology are presented.

74. MM5483 is a monolithic integrated circuit utilizing CMOS metal-gate low-threshold enhancement mode devices.

75. A complementary metal oxide semiconductor(CMOS) readout integrated circuit(ROIC) for the sensitive material of vanadium dioxide(VO_2) was introduced.

76. Based on analysis of the principle of substrate current of MOSFETs, a new hot carriers resistant structure of CMOS digital circuits is proposed.

77. This paper describes the design and the principle experiments of a micro digital sun sensor based on a novel diaphragm and active pixel sensor (APS) CMOS image sensor.

78. Low power fast CMOS analog switch. Double pole, single throw (DPST).

79. To boot an operating system, the BIOS runtime searches for devices that are both active and bootable in the order of preference defined by the complementary metal oxide semiconductor (CMOS) settings.

80. Finally, achievements of conversion gain, Linearity and noise figure of CMOS mixers are summarized and compared.

81. This paper puts forward an over current protection circuit for CMOS class - D audio power amplifier applications.

82. V CMOS operational amplifier with rail - to - rail input and output ranges.

83. On the basis of the multiple-valued switch-level algebra, this paper proposes a logic design automation algorithm for NMOS and CMOS combinational circuits.

84. The metal oxides in CMOS and MOSFET devices are not conductors.

85. In this paper, a novel high precision CMOS bandgap voltage reference which uses a negative back circuit and a RC filter to enhance the PSRR is proposed.

86. Because of topology's complexity, there may be several potential parasitic latch-up paths in a CMOS integrated circuit.

87. After comparing the designed circuits with the existing CMOS tristate one, it is showed that they are of the same circuits′ structure.

88. The goal of this work is to use a standard CMOS process to construct a wideband amplifier with low power consumption.

89. It explains the enlarging of CMOS chip and the design of keyboard display interface.

90. CMOS chip 89C52 or 374 on the mother board damaged, can also cause such phenomenon and at the same time, caused much noisy on the small carriage and axis.

91. An ESD protection circuit for IC cards is described, which is based on CMOS process.

92. It is important to note that the cost of off-chip inductors is mitigated by the removal of the large area on-chip passive inductors from the expensive submicron CMOS die area.

93. The design has been used in the data transmission of CMOS image sensor and has passed the FPGA prototype verification correctly.

94. Single-chip 16-bit CMOS microcomputer. ROM 16K bytes, RAM 512 bytes. External clock input frequency 16 MHz.

95. Based on the interference of diffraction grating and the technology of CMOS linear image sensor, the refraction index of transparent materials is measured automatically.

96. At present, leading-edge chip makers are using conventional bulk CMOS and planar transistor structures for the 32-/28-nm nodes.

97. The power leakage principle of CMOS device is introduced, which is in direct portion to Hamming distance processed in gate.

98. Through analyzing its work principle, we find the method to raise the speed: use a novel CMOS dynamic D flip-flop and an improved synchronous frequency divider.

99. A wide-band CMOS low-noise amplifier(LNA) is presented, in which the input MOSFET thermal noise is canceled by exploiting a noise-canceling technique.

100. Design - For - Testability, DFT has become a very important part of the CMOS chip and system design.

101. In this paper, the spectral function is realized by using bidirectional current-mode CMOS circuits, and it provides a new technique method for the design of digital circuits.

102. The powerof instrument is reduced greatly because of the CMOS chip being used.

103. To verify the model, a test circuit has been designed to simulate parasitical latch-up paths in CMOS devices and relevant parameters are reported.Sentencedict

104. However, as the design rule continuously shrank down beyond the 45 nm , conventional planar CMOS devices encounter significant challenges.

105. FPGAs rely on the ubiquitous transistor - based technology called complementary metal oxide semiconductor ( CMOS ).

106. A CMOS device with polysilicon protection tiles is shown in Figure 2.

107. We propose a new subdivision technique directly subdividing the grating stripe by using complementary metal-oxide semiconductor (CMOS) microscopic imaging system combined with image processing.

108. Hex D flip-flop with common clock and reset. High-performance silicon-gate CMOS.

109. When trying to explain the latch-up window phenomena in CMOS devices induced by radiation, the so called "three-path" latch-up window model is provided.

110. A timing circuit is designed to reduce the effect of digital noise on analog signal in CMOS image sensor(CIS).

111. In the part of OSC, the CMOS chip prevents EMI by using frequency jitter technique.

112. Through a flip-flop, monostable or amplifying circuit composed of a CMOS element, the electromotive force controls the on and off, the delaying or the instantaneous on and off of the load.

113. This Schmitt trigger circuit can be suited to the deep sub-micron CMOS process and used to get rid of the noise on the input pad of the chip.

114. The optical system of the micro digital sun sensor consists of APS CMOS image sensor and MEMS based diaphragm with pinhole array structure.

115. The synthesis technique for multivalued CMOS circuits based on transmission function theory is discussed.

116. Guided by the switch-signal theory, this paper introduced design theory suitable for current-mode CMOS circuits at switch level.

117. Pulse Width Decoder-A Flxxible Application of Integrated Analog Switch CMOS.

118. Camera sources today are overwhelmingly based on either charge-coupled device ( CCD ) or CMOS technology.

119. The prepared CMOS image sensor meets the requirement for technological parameters of devices, has high fill factor and effectively improves the image quality of the CMOS image sensor.

120. High speed , high gain CMOS operational amplifier ( OP ) is treated in this thesis.

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